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Horizontaal
TTL - technology 
74 Series Logic ICs 74LS (Low-power Schottky) family, 74HC family High-speed CMOS circuitry, 74HCT family, a special version of 74HC with 74LS TTL-compatible inputs, open collector outputs
An Introduction to Digital Logic Familities
Bipolar Transistor Logic Basic Bipolar Transistor Logic, Diode-Transistor Logic, Transistor-Transistor Logic, TTL Circuits and Noise Margin
Comparison of MM74HC to 74LS, 74S and 74ALS Logic The MM54HC/MM74HC family of high speed logic components provides a combination of speed and power characteristics that is not duplicated by bipolar logic families or any other CMOS family, pdf file
Designing with TTL Designing with TTL, pdf file
DIODE TRANSISTOR LOGIC (DTL) pdf file
Diode-Transistor Logic (DTL) pdf file
DIODE TRANSISTOR LOGIC diode transistor logic, pdf file
Drive Capabilities & Propagation Delay output of a TTL IC, propagation delay
Famille TTL en Franšais, pdf file
Gate characteristics basic characteristic and limitations of gates, Totem-Pole Output, TTL Open-Collector Output, Tri-State Outputs
Logic levels for standard TTL chips
Logic levels for 74LSXX TTL chips
Low-Power Schottky TTL (74LS) pdf file
Low power Schottky TTL logic levels 74lsXX, Low Power Schottky TTL Logic Levels, Fan in, Fan out, Noise Margin
Standard TTL logic levels 74XX
Termination of ECL Logic Devices with EF (Emitter Follower) OUTPUT Structure A standard Emitter Coupled Logic (ECL) output driver typically uses a current switching differential with an emitter follower for level shifting the output and the internal CML levels to familiar ECL levels, ..., pdf file
TTL en Franšais
TTL Design Checklist TTL Logic Families
TTL logic gates pdf file
TTL Logic Families Transistor-transistor Logic (TTL), multi-emitter transistor, Totem Pole, Open Collector, Tristate, pdf file
TTL LOGIC LEVELS ICs accept voltages ranging from 2V-5V as high or logic 1 and voltages ranging from 0V-.8V as low or logic 0
TTL NOR-OR gate pdf file
TTL to RS-232 interface using a MAXIM RS-232 transceiver IC
Transistor transistor logic TTL gate
Transistor transistor logic TTL, Transistor transistor logic, TTL gate, pdf file
Transistor-Transistor Logic and BiCMOS
Transistor transistor logic gates transistor transistor logic gates, pdf file
TRANSISTOR-TRANSISTOR LOGIC (TTL)-inverter pdf file
 
ECL - PECL technology 
AC Characteristics of ECL Devices
Comparison of LVDS, CMOS, and ECL pdf file
PECL Positive Emitter Coupled Logic technology, (PECL)
ECL ECL: Emitter Coupled Logic
ECL Emitter Coupled Logic, pdf file
ECL Backplane Design ECL outputs are perfectly suited to drive transmission lines. With an output impedance of 6Ω to 8Ω and rise times less than 1 ns, reflections are minimized resulting in a clean signal, pdf file
ECL Clock Distribution Techniques ECL Clock Distribution Techniques application note, This application note provides information on system design using ECL logic technologies for reducing system clock skew over the alternative CMOS and TTL technologies, pdf file
ECL design principles ECL design principles, pdf file
ECL Outputs This application note covers the principal advantages of using ECL outputs, pdf file
Emitter Coupled Logic Emitter Coupled Logic
Interfacing Between LVDS and ECL Interfacing Between LVDS and ECL application note, pdf file
Operating ECL from a Single Positive Supply pdf file
PECL Positive Emitter Coupled Logic (PECL) is a positive supply rail referred high-speed transmission standard that has been optimized for use in bipolar IC technology, pdf file
Horizontaal

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Last updated on: 2011-01-02 | Copyright © 2011-2013 Educypedia.

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